Referenzen
64. |
Combinatorial optimization
Band 21
aus Algorithms and Combinatorics
Herausgeber: Springer, Heidelberg,
Fifth Edition
2012
ISBN: 978-3-642-24487-2
|
63. |
Ottimizzazione combinatoria
Band 49
aus Unitext
Herausgeber: Springer-Verlag Italia, Milan,
2011
ISBN: 978-88-470-1522-7
|
62. |
Combinatorial optimization in VLSI design
In
, Editor,
Combinatorial Optimization: Methods and Applications
Seite 33--96.
Herausgeber: IOS Press, Amsterdam
2011
|
61. |
Mathematics in Chip Design
In
, Editor,
Seite 179--206.
Herausgeber: Springer, Berlin
2010
|
60. |
Combinatorial optimization
Band 21
aus Algorithms and Combinatorics
Herausgeber: Springer-Verlag, Berlin,
Fourth Edition
2008
ISBN: 978-3-540-71843-7
|
59. |
Combinatorial problems in chip design
Building bridges Band 19
aus Bolyai Soc. Math. Stud.
Seite 333--368.
Herausgeber: Springer, Berlin,
2008
|
58. |
BonnTools: mathematical innovation for layout and timing closure of systems on a chip
Proceedings of the IEEE,
95:555--572
2007
|
57. |
Combinatorial optimization
Band 21
aus Algorithms and Combinatorics
Herausgeber: Springer-Verlag, Berlin,
Third Edition
2006
ISBN: 978-3-540-25684-7; 3-540-25684-9
|
56. |
Clock scheduling and clocktree construction for high performance ASICs
Proceedings of the IEEE International Conference on Computer Aided Design,
:232-239
2003
|
55. |
Clock scheduling and clocktree construction for high performance ASICs
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design
, Seite 232--239.
2003
|
54. |
Combinatorial optimization
Band 21
aus Algorithms and Combinatorics
Herausgeber: Springer-Verlag, Berlin,
Second Edition
2002
ISBN: 3-540-43154-3
|
53. |
Maximum mean weight cycle in a digraph and minimizing cycle time of a logic chip
Band 123
Seite 103--127.
2002
|