Profile
References
6. |
The repeater tree construction problem
Inform. Process. Lett.,
110(24):1079--1083
2010
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5. |
Fast buffering for optimizing worst slack and resourceconsumption in repeater trees
Proceedings of the 2009 international symposium onPhysical design
, page 43--50.
ACM
2009
|
4. |
Gate sizing for large cell-based designs
Proceedings of the Conference on Design, Automationand Test in Europe
, page 827--832.
European Design and Automation Association
2009
|
3. |
Timing closure in chip design
PhD Thesis, University of Bonn,
2008
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2. |
Efficient generation of short and fast repeater treetopologies
Proceedings of the 2006 international symposium onPhysical design
, page 120--127.
ACM
2006
|
1. |
Clock scheduling and clocktree construction for highperformance ASICs
Proceedings of the 2003 IEEE/ACM internationalconference on Computer-aided design
, page 232.
IEEE Computer Society
2003
|